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rust-gpu_skill
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3
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2 months ago
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Installation
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npx veilstrat add skill huiali/rust-skills --skill rust-gpu- SKILL_EN.md1.4 KB
- SKILL_ZH.md6.2 KB
- SKILL.md6.2 KB
Overview
This skill provides practical GPU memory and compute guidance for Rust engineers working with CUDA, OpenCL, compute shaders, and heterogeneous systems. It focuses on memory types, allocation patterns, zero-copy and unified memory, coalesced access, shared memory reduction, and alignment strategies. The content helps diagnose performance issues and design efficient data movement for high-throughput kernels.
How this skill works
The skill inspects typical GPU memory layers (global/VRAM, shared/SMEM, constant, local, registers) and maps Rust/CUDA patterns to each. It outlines allocation and copy idioms (cudaMalloc, cudaMallocHost, cudaMallocManaged, cudaMemcpyAsync) and recommends code motifs for coalescing, shared-memory reduction, and alignment. It also provides a checklist of performance checks and integration pointers for related Rust practices.
When to use it
- Designing kernel data layouts and access patterns for high memory bandwidth
- Implementing host↔device transfers with minimal stalls and overlapped compute
- Choosing between page-locked (zero-copy) memory, unified memory, or explicit copies
- Optimizing reductions, tiling, or other shared-memory algorithms
- Diagnosing low GPU utilization or memory-bound kernels
Best practices
- Favor coalesced global memory access: threads should read contiguous elements to maximize bandwidth
- Use shared memory to stage data and reduce global memory traffic for intra-block communication
- Prefer page-locked host memory (cudaMallocHost) only when beneficial; it increases system memory pressure
- Use asynchronous memcpy and streams to overlap data transfer with kernel execution
- Align structures to 256-byte boundaries when layouts cross cache lines or use wide loads/stores
Example use cases
- Porting a CPU vectorized loop to a GPU kernel and ensuring global accesses are coalesced
- Implementing a block-wise reduction using shared memory to reduce global traffic
- Using cudaMallocHost for real-time capture buffers to enable zero-copy access from GPU
- Switching to cudaMallocManaged to simplify pointer semantics for prototyping or irregular access patterns
- Diagnosing a memory-bound kernel by checking stride patterns, alignment, and shared-memory usage
FAQ
Use unified memory for convenience or when working with irregular access patterns and rapid prototyping. For maximum performance and predictable transfers, prefer explicit cudaMalloc + cudaMemcpy with carefully scheduled asynchronous copies.
Does zero-copy always improve latency?
No. Zero-copy (page-locked host memory) can reduce copy overhead but may increase system memory pressure and have lower throughput than device-local VRAM for heavy workloads. Measure both approaches for your workload.
How large should shared memory tiles be?
Tile size should fit per-block shared memory limits and enable efficient warp-level parallelism. Common choices are powers of two that match blockDim.x and allow reduction loops to halve the active range each step.